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<title>Static Call Graph - [.\Projec4.axf]</title></head>
<body><HR>
<H1>Static Call Graph for image .\Projec4.axf</H1><HR>
<BR><P>#&#060CALLGRAPH&#062# ARM Linker, 6230001: Last Updated: Tue Jul 22 16:36:47 2025
<BR><P>
<H3>Maximum Stack Usage =        420 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
Call chain for Maximum Stack Depth:</H3>
main &rArr; bsp_board_config &rArr; gd_eval_com_init &rArr; usart_baudrate_set &rArr; rcu_clock_freq_get &rArr; rcu_pll_clock_freq_cal
<P>
<H3>
Mutually Recursive functions
</H3> <LI><a href="#[1c]">ADC0_1_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1c]">ADC0_1_IRQHandler</a><BR>
</UL>
<P>
<H3>
Function Pointers
</H3><UL>
 <LI><a href="#[1c]">ADC0_1_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[6d]">ADC2_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[4]">BusFault_Handler</a> from gd32h7xx_it.o(.text.BusFault_Handler) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[89]">CAN0_Busoff_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[8a]">CAN0_Error_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[8b]">CAN0_FastError_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[88]">CAN0_Message_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[8d]">CAN0_REC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[8c]">CAN0_TEC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[87]">CAN0_WKUP_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[90]">CAN1_Busoff_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[91]">CAN1_Error_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[92]">CAN1_FastError_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[8f]">CAN1_Message_IRQHandler</a> from main.o(.text.CAN1_Message_IRQHandler) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[94]">CAN1_REC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[93]">CAN1_TEC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[8e]">CAN1_WKUP_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[97]">CAN2_Busoff_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[98]">CAN2_Error_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[99]">CAN2_FastError_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[96]">CAN2_Message_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[9b]">CAN2_REC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[9a]">CAN2_TEC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[95]">CAN2_WKUP_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[4f]">CAU_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[6e]">CMP0_1_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[6f]">CTC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[4e]">DCI_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[15]">DMA0_Channel0_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[16]">DMA0_Channel1_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[17]">DMA0_Channel2_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[18]">DMA0_Channel3_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[19]">DMA0_Channel4_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[1a]">DMA0_Channel5_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[1b]">DMA0_Channel6_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[34]">DMA0_Channel7_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[3d]">DMA1_Channel0_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[3e]">DMA1_Channel1_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[3f]">DMA1_Channel2_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[40]">DMA1_Channel3_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[41]">DMA1_Channel4_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[44]">DMA1_Channel5_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[45]">DMA1_Channel6_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[46]">DMA1_Channel7_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[60]">DMAMUX_OVR_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[7]">DebugMon_Handler</a> from gd32h7xx_it.o(.text.DebugMon_Handler) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[9c]">EFUSE_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[42]">ENET0_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[43]">ENET0_WKUP_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[85]">ENET1_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[86]">ENET1_WKUP_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[35]">EXMC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[10]">EXTI0_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[2e]">EXTI10_15_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[11]">EXTI1_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[12]">EXTI2_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[13]">EXTI3_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[14]">EXTI4_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[1d]">EXTI5_9_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[74]">FAC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[e]">FMC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[51]">FPU_IRQHandler</a> from gd32h7xx_it.o(.text.FPU_IRQHandler) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[50]">HAU_TRNG_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[61]">HPDF_INT0_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[62]">HPDF_INT1_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[63]">HPDF_INT2_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[64]">HPDF_INT3_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[6c]">HWSEM_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[2]">HardFault_Handler</a> from gd32h7xx_it.o(.text.HardFault_Handler) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[26]">I2C0_ER_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[25]">I2C0_EV_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[9d]">I2C0_WKUP_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[28]">I2C1_ER_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[27]">I2C1_EV_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[9e]">I2C1_WKUP_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[49]">I2C2_ER_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[48]">I2C2_EV_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[9f]">I2C2_WKUP_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[5e]">I2C3_ER_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[5d]">I2C3_EV_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[a0]">I2C3_WKUP_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[5a]">IPA_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[a1]">LPDTS_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[a2]">LPDTS_WKUP_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[69]">MDIO_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[6a]">MDMA_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[3]">MemManage_Handler</a> from gd32h7xx_it.o(.text.MemManage_Handler) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[1]">NMI_Handler</a> from gd32h7xx_it.o(.text.NMI_Handler) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[5c]">OSPI0_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[71]">OSPI1_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[8]">PendSV_Handler</a> from gd32h7xx_it.o(.text.PendSV_Handler) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[70]">RAMECCMU_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[f]">RCU_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[5f]">RSPDIF_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[2f]">RTC_Alarm_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[d]">RTC_WKUP_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[72]">RTDEC0_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[73]">RTDEC1_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[0]">Reset_Handler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[57]">SAI0_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[5b]">SAI1_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[65]">SAI2_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[36]">SDIO0_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[6b]">SDIO1_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[29]">SPI0_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[2a]">SPI1_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[38]">SPI2_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[54]">SPI3_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[55]">SPI4_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[56]">SPI5_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[6]">SVC_Handler</a> from gd32h7xx_it.o(.text.SVC_Handler) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[9]">SysTick_Handler</a> from gd32h7xx_it.o(.text.SysTick_Handler) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[ae]">SystemInit</a> from system_gd32h7xx.o(.text.SystemInit) referenced from startup_gd32h7xx.o(.text)
 <LI><a href="#[c]">TAMPER_STAMP_LXTAL_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[1e]">TIMER0_BRK_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[21]">TIMER0_Channel_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[a3]">TIMER0_DEC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[20]">TIMER0_TRG_CMT_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[1f]">TIMER0_UP_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[66]">TIMER14_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[67]">TIMER15_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[68]">TIMER16_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[a5]">TIMER1_DEC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[22]">TIMER1_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[a9]">TIMER22_DEC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[76]">TIMER22_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[aa]">TIMER23_DEC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[77]">TIMER23_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[a6]">TIMER2_DEC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[23]">TIMER2_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[ab]">TIMER30_DEC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[78]">TIMER30_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[ac]">TIMER31_DEC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[79]">TIMER31_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[a7]">TIMER3_DEC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[24]">TIMER3_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[7a]">TIMER40_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[7b]">TIMER41_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[7c]">TIMER42_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[7d]">TIMER43_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[7e]">TIMER44_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[a8]">TIMER4_DEC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[37]">TIMER4_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[7f]">TIMER50_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[80]">TIMER51_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[3b]">TIMER5_DAC_UDR_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[3c]">TIMER6_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[30]">TIMER7_BRK_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[33]">TIMER7_Channel_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[a4]">TIMER7_DEC_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[32]">TIMER7_TRG_CMT_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[31]">TIMER7_UP_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[59]">TLI_ER_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[58]">TLI_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[75]">TMU_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[39]">UART3_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[3a]">UART4_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[52]">UART6_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[53]">UART7_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[2b]">USART0_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[2c]">USART1_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[2d]">USART2_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[47]">USART5_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[4b]">USBHS0_EP1_IN_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[4a]">USBHS0_EP1_OUT_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[4d]">USBHS0_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[4c]">USBHS0_WKUP_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[82]">USBHS1_EP1_IN_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[81]">USBHS1_EP1_OUT_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[84]">USBHS1_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[83]">USBHS1_WKUP_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[5]">UsageFault_Handler</a> from gd32h7xx_it.o(.text.UsageFault_Handler) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[b]">VAVD_LVD_VOVD_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[a]">WWDGT_IRQHandler</a> from startup_gd32h7xx.o(.text) referenced from startup_gd32h7xx.o(RESET)
 <LI><a href="#[af]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup_gd32h7xx.o(.text)
 <LI><a href="#[b0]">fputc</a> from main.o(.text.fputc) referenced from printfa.o(i.__0printf)
 <LI><a href="#[ad]">main</a> from main.o(.text.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
</UL>
<P>
<H3>
Global Symbols
</H3>
<P><STRONG><a name="[af]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(.text)
</UL>
<P><STRONG><a name="[102]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))

<P><STRONG><a name="[b1]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Calls]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>

<P><STRONG><a name="[bf]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>

<P><STRONG><a name="[103]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))

<P><STRONG><a name="[104]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))

<P><STRONG><a name="[105]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))

<P><STRONG><a name="[106]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D))

<P><STRONG><a name="[107]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F))

<P><STRONG><a name="[0]"></a>Reset_Handler</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[1c]"></a>ADC0_1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC0_1_IRQHandler
</UL>
<BR>[Called By]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC0_1_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[6d]"></a>ADC2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[89]"></a>CAN0_Busoff_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[8a]"></a>CAN0_Error_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[8b]"></a>CAN0_FastError_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[88]"></a>CAN0_Message_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[8d]"></a>CAN0_REC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[8c]"></a>CAN0_TEC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[87]"></a>CAN0_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[90]"></a>CAN1_Busoff_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[91]"></a>CAN1_Error_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[92]"></a>CAN1_FastError_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[94]"></a>CAN1_REC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[93]"></a>CAN1_TEC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[8e]"></a>CAN1_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[97]"></a>CAN2_Busoff_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[98]"></a>CAN2_Error_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[99]"></a>CAN2_FastError_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[96]"></a>CAN2_Message_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[9b]"></a>CAN2_REC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[9a]"></a>CAN2_TEC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[95]"></a>CAN2_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[4f]"></a>CAU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[6e]"></a>CMP0_1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[6f]"></a>CTC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[4e]"></a>DCI_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[15]"></a>DMA0_Channel0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[16]"></a>DMA0_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[17]"></a>DMA0_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[18]"></a>DMA0_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[19]"></a>DMA0_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[1a]"></a>DMA0_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[1b]"></a>DMA0_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[34]"></a>DMA0_Channel7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[3d]"></a>DMA1_Channel0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[3e]"></a>DMA1_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[3f]"></a>DMA1_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[40]"></a>DMA1_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[41]"></a>DMA1_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[44]"></a>DMA1_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[45]"></a>DMA1_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[46]"></a>DMA1_Channel7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[60]"></a>DMAMUX_OVR_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[9c]"></a>EFUSE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[42]"></a>ENET0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[43]"></a>ENET0_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[85]"></a>ENET1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[86]"></a>ENET1_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[35]"></a>EXMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[10]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[2e]"></a>EXTI10_15_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[11]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[12]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[13]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[14]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[1d]"></a>EXTI5_9_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[74]"></a>FAC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[e]"></a>FMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[50]"></a>HAU_TRNG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[61]"></a>HPDF_INT0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[62]"></a>HPDF_INT1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[63]"></a>HPDF_INT2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[64]"></a>HPDF_INT3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[6c]"></a>HWSEM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[26]"></a>I2C0_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[25]"></a>I2C0_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[9d]"></a>I2C0_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[28]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[27]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[9e]"></a>I2C1_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[49]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[48]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[9f]"></a>I2C2_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[5e]"></a>I2C3_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[5d]"></a>I2C3_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[a0]"></a>I2C3_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[5a]"></a>IPA_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[a1]"></a>LPDTS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[a2]"></a>LPDTS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[69]"></a>MDIO_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[6a]"></a>MDMA_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[5c]"></a>OSPI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[71]"></a>OSPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[70]"></a>RAMECCMU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[f]"></a>RCU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[5f]"></a>RSPDIF_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[2f]"></a>RTC_Alarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[d]"></a>RTC_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[72]"></a>RTDEC0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[73]"></a>RTDEC1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[57]"></a>SAI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[5b]"></a>SAI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[65]"></a>SAI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[36]"></a>SDIO0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[6b]"></a>SDIO1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[29]"></a>SPI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[2a]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[38]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[54]"></a>SPI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[55]"></a>SPI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[56]"></a>SPI5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[c]"></a>TAMPER_STAMP_LXTAL_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[1e]"></a>TIMER0_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[21]"></a>TIMER0_Channel_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[a3]"></a>TIMER0_DEC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[20]"></a>TIMER0_TRG_CMT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[1f]"></a>TIMER0_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[66]"></a>TIMER14_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[67]"></a>TIMER15_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[68]"></a>TIMER16_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[a5]"></a>TIMER1_DEC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[22]"></a>TIMER1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[a9]"></a>TIMER22_DEC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[76]"></a>TIMER22_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[aa]"></a>TIMER23_DEC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[77]"></a>TIMER23_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[a6]"></a>TIMER2_DEC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[23]"></a>TIMER2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[ab]"></a>TIMER30_DEC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[78]"></a>TIMER30_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[ac]"></a>TIMER31_DEC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[79]"></a>TIMER31_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[a7]"></a>TIMER3_DEC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[24]"></a>TIMER3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[7a]"></a>TIMER40_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[7b]"></a>TIMER41_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[7c]"></a>TIMER42_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[7d]"></a>TIMER43_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[7e]"></a>TIMER44_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[a8]"></a>TIMER4_DEC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[37]"></a>TIMER4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[7f]"></a>TIMER50_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[80]"></a>TIMER51_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[3b]"></a>TIMER5_DAC_UDR_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[3c]"></a>TIMER6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[30]"></a>TIMER7_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[33]"></a>TIMER7_Channel_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[a4]"></a>TIMER7_DEC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[32]"></a>TIMER7_TRG_CMT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[31]"></a>TIMER7_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[59]"></a>TLI_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[58]"></a>TLI_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[75]"></a>TMU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[39]"></a>UART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[3a]"></a>UART4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[52]"></a>UART6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[53]"></a>UART7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[2b]"></a>USART0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[2c]"></a>USART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[2d]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[47]"></a>USART5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[4b]"></a>USBHS0_EP1_IN_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[4a]"></a>USBHS0_EP1_OUT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[4d]"></a>USBHS0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[4c]"></a>USBHS0_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[82]"></a>USBHS1_EP1_IN_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[81]"></a>USBHS1_EP1_OUT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[84]"></a>USBHS1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[83]"></a>USBHS1_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[b]"></a>VAVD_LVD_VOVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[a]"></a>WWDGT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32h7xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[b3]"></a>__aeabi_uldivmod</STRONG> (Thumb, 98 bytes, Stack size 40 bytes, uldiv.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = __aeabi_uldivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
</UL>
<BR>[Called By]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;print_test_results
<LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;print_test_status
<LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_micros
<LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
<LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
</UL>

<P><STRONG><a name="[108]"></a>__aeabi_uidiv</STRONG> (Thumb, 0 bytes, Stack size 12 bytes, uidiv.o(.text), UNUSED)

<P><STRONG><a name="[101]"></a>__aeabi_uidivmod</STRONG> (Thumb, 44 bytes, Stack size 12 bytes, uidiv.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[b5]"></a>__aeabi_llsl</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, llshl.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
<LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2ulz
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
</UL>

<P><STRONG><a name="[109]"></a>_ll_shift_l</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llshl.o(.text), UNUSED)

<P><STRONG><a name="[b4]"></a>__aeabi_llsr</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, llushr.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2ulz
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
</UL>

<P><STRONG><a name="[10a]"></a>_ll_ushift_r</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llushr.o(.text), UNUSED)

<P><STRONG><a name="[10b]"></a>__I$use$fp</STRONG> (Thumb, 0 bytes, Stack size 48 bytes, iusefp.o(.text), UNUSED)

<P><STRONG><a name="[b6]"></a>__aeabi_dadd</STRONG> (Thumb, 322 bytes, Stack size 48 bytes, dadd.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_lasr
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
</UL>
<BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
<LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_drsub
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dsub
</UL>

<P><STRONG><a name="[ba]"></a>__aeabi_dsub</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, dadd.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
</UL>

<P><STRONG><a name="[bb]"></a>__aeabi_drsub</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, dadd.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
</UL>

<P><STRONG><a name="[bc]"></a>__aeabi_dmul</STRONG> (Thumb, 228 bytes, Stack size 48 bytes, dmul.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
</UL>
<BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
</UL>

<P><STRONG><a name="[bd]"></a>__aeabi_ddiv</STRONG> (Thumb, 222 bytes, Stack size 32 bytes, ddiv.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
</UL>
<BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
</UL>

<P><STRONG><a name="[be]"></a>__aeabi_d2ulz</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, dfixul.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
</UL>
<BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
</UL>

<P><STRONG><a name="[fe]"></a>__aeabi_cdrcmple</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, cdrcmple.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
</UL>

<P><STRONG><a name="[b2]"></a>__scatterload</STRONG> (Thumb, 38 bytes, Stack size 0 bytes, init.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload
</UL>
<BR>[Called By]<UL><LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload
</UL>

<P><STRONG><a name="[10c]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)

<P><STRONG><a name="[b7]"></a>__aeabi_lasr</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, llsshr.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
</UL>

<P><STRONG><a name="[10d]"></a>_ll_sshift_r</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llsshr.o(.text), UNUSED)

<P><STRONG><a name="[b9]"></a>_double_round</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, depilogue.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
<LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
</UL>

<P><STRONG><a name="[b8]"></a>_double_epilogue</STRONG> (Thumb, 156 bytes, Stack size 32 bytes, depilogue.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
</UL>
<BR>[Called By]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
<LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
</UL>

<P><STRONG><a name="[4]"></a>BusFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32h7xx_it.o(.text.BusFault_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[8f]"></a>CAN1_Message_IRQHandler</STRONG> (Thumb, 266 bytes, Stack size 16 bytes, main.o(.text.CAN1_Message_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = CAN1_Message_IRQHandler &rArr; can_mailbox_receive_data_read &rArr; can_data_to_little_endian_swap
</UL>
<BR>[Calls]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_mailbox_receive_data_read
<LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_interrupt_flag_clear
<LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_interrupt_flag_get
<LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_mailbox_config
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;print_test_results
<LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reset_test_data
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;is_all_zero_data
<LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_micros
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;printf
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[7]"></a>DebugMon_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32h7xx_it.o(.text.DebugMon_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[51]"></a>FPU_IRQHandler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32h7xx_it.o(.text.FPU_IRQHandler))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32h7xx_it.o(.text.HardFault_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[3]"></a>MemManage_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32h7xx_it.o(.text.MemManage_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32h7xx_it.o(.text.NMI_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[8]"></a>PendSV_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32h7xx_it.o(.text.PendSV_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[6]"></a>SVC_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32h7xx_it.o(.text.SVC_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[9]"></a>SysTick_Handler</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, gd32h7xx_it.o(.text.SysTick_Handler))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = SysTick_Handler
</UL>
<BR>[Calls]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_decrement
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[ae]"></a>SystemInit</STRONG> (Thumb, 730 bytes, Stack size 16 bytes, system_gd32h7xx.o(.text.SystemInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = SystemInit &rArr; system_clock_config &rArr; system_clock_600m_hxtal
</UL>
<BR>[Calls]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_vector_table_set
<LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_config
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(.text)
</UL>
<P><STRONG><a name="[5]"></a>UsageFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32h7xx_it.o(.text.UsageFault_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32h7xx.o(RESET)
</UL>
<P><STRONG><a name="[ce]"></a>bsp_board_config</STRONG> (Thumb, 46 bytes, Stack size 16 bytes, main.o(.text.bsp_board_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 364<LI>Call Chain = bsp_board_config &rArr; gd_eval_com_init &rArr; usart_baudrate_set &rArr; rcu_clock_freq_get &rArr; rcu_pll_clock_freq_cal
</UL>
<BR>[Calls]<UL><LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_led_off
<LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_led_init
<LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;printf
</UL>
<BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[f1]"></a>cache_enable</STRONG> (Thumb, 222 bytes, Stack size 12 bytes, main.o(.text.cache_enable))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = cache_enable
</UL>
<BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[d2]"></a>can_config</STRONG> (Thumb, 184 bytes, Stack size 72 bytes, main.o(.text.can_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = can_config &rArr; can_init &rArr; can_software_reset
</UL>
<BR>[Calls]<UL><LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_operation_mode_get
<LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_operation_mode_enter
<LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
<LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_init
<LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_deinit
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_struct_para_init
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;printf
</UL>
<BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[d3]"></a>can_deinit</STRONG> (Thumb, 112 bytes, Stack size 24 bytes, gd32h7xx_can.o(.text.can_deinit))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = can_deinit &rArr; rcu_periph_reset_disable
</UL>
<BR>[Calls]<UL><LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_disable
<LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_enable
</UL>
<BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_config
</UL>

<P><STRONG><a name="[db]"></a>can_gpio_config</STRONG> (Thumb, 124 bytes, Stack size 40 bytes, main.o(.text.can_gpio_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 68<LI>Call Chain = can_gpio_config &rArr; gpio_mode_set
</UL>
<BR>[Calls]<UL><LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_af_set
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_mode_set
<LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_output_options_set
<LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
<LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_can_clock_config
</UL>
<BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[d5]"></a>can_init</STRONG> (Thumb, 500 bytes, Stack size 32 bytes, gd32h7xx_can.o(.text.can_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = can_init &rArr; can_software_reset
</UL>
<BR>[Calls]<UL><LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_software_reset
</UL>
<BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_config
</UL>

<P><STRONG><a name="[e2]"></a>can_interrupt_enable</STRONG> (Thumb, 156 bytes, Stack size 24 bytes, gd32h7xx_can.o(.text.can_interrupt_enable))
<BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = can_interrupt_enable &rArr; can_operation_mode_enter
</UL>
<BR>[Calls]<UL><LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_operation_mode_get
<LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_operation_mode_enter
</UL>
<BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[c1]"></a>can_interrupt_flag_clear</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, gd32h7xx_can.o(.text.can_interrupt_flag_clear))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = can_interrupt_flag_clear
</UL>
<BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Message_IRQHandler
</UL>

<P><STRONG><a name="[c0]"></a>can_interrupt_flag_get</STRONG> (Thumb, 52 bytes, Stack size 12 bytes, gd32h7xx_can.o(.text.can_interrupt_flag_get))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = can_interrupt_flag_get
</UL>
<BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Message_IRQHandler
</UL>

<P><STRONG><a name="[c8]"></a>can_mailbox_config</STRONG> (Thumb, 388 bytes, Stack size 40 bytes, gd32h7xx_can.o(.text.can_mailbox_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = can_mailbox_config &rArr; can_data_to_big_endian_swap
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_ram_address_get
<LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_data_to_big_endian_swap
<LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_dlc_value_compute
</UL>
<BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Message_IRQHandler
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[c2]"></a>can_mailbox_receive_data_read</STRONG> (Thumb, 278 bytes, Stack size 48 bytes, gd32h7xx_can.o(.text.can_mailbox_receive_data_read))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = can_mailbox_receive_data_read &rArr; can_data_to_little_endian_swap
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_ram_address_get
<LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_payload_size_compute
<LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_data_to_little_endian_swap
</UL>
<BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Message_IRQHandler
</UL>

<P><STRONG><a name="[d7]"></a>can_operation_mode_enter</STRONG> (Thumb, 478 bytes, Stack size 36 bytes, gd32h7xx_can.o(.text.can_operation_mode_enter))
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = can_operation_mode_enter
</UL>
<BR>[Called By]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_interrupt_enable
<LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_config
</UL>

<P><STRONG><a name="[d8]"></a>can_operation_mode_get</STRONG> (Thumb, 156 bytes, Stack size 12 bytes, gd32h7xx_can.o(.text.can_operation_mode_get))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = can_operation_mode_get
</UL>
<BR>[Called By]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_interrupt_enable
<LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_config
</UL>

<P><STRONG><a name="[e3]"></a>can_ram_address_get</STRONG> (Thumb, 70 bytes, Stack size 16 bytes, gd32h7xx_can.o(.text.can_ram_address_get))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = can_ram_address_get
</UL>
<BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_mailbox_receive_data_read
<LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_mailbox_config
</UL>

<P><STRONG><a name="[e1]"></a>can_software_reset</STRONG> (Thumb, 102 bytes, Stack size 16 bytes, gd32h7xx_can.o(.text.can_software_reset))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = can_software_reset
</UL>
<BR>[Called By]<UL><LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_init
</UL>

<P><STRONG><a name="[d4]"></a>can_struct_para_init</STRONG> (Thumb, 578 bytes, Stack size 16 bytes, gd32h7xx_can.o(.text.can_struct_para_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = can_struct_para_init
</UL>
<BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_config
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[e8]"></a>communication_check</STRONG> (Thumb, 78 bytes, Stack size 8 bytes, main.o(.text.communication_check))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = communication_check &rArr; gd_eval_led_toggle
</UL>
<BR>[Calls]<UL><LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_led_toggle
</UL>
<BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[cb]"></a>delay_decrement</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, systick.o(.text.delay_decrement))
<BR><BR>[Called By]<UL><LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
</UL>

<P><STRONG><a name="[b0]"></a>fputc</STRONG> (Thumb, 54 bytes, Stack size 16 bytes, main.o(.text.fputc))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = fputc &rArr; usart_flag_get
</UL>
<BR>[Calls]<UL><LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_data_transmit
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_flag_get
</UL>
<BR>[Address Reference Count : 1]<UL><LI> printfa.o(i.__0printf)
</UL>
<P><STRONG><a name="[cf]"></a>gd_eval_com_init</STRONG> (Thumb, 218 bytes, Stack size 48 bytes, gd32h759i_eval.o(.text.gd_eval_com_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 348<LI>Call Chain = gd_eval_com_init &rArr; usart_baudrate_set &rArr; rcu_clock_freq_get &rArr; rcu_pll_clock_freq_cal
</UL>
<BR>[Calls]<UL><LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_af_set
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_mode_set
<LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_output_options_set
<LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
<LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_receive_config
<LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_transmit_config
<LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_enable
<LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_baudrate_set
<LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
</UL>
<BR>[Called By]<UL><LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bsp_board_config
</UL>

<P><STRONG><a name="[d0]"></a>gd_eval_led_init</STRONG> (Thumb, 118 bytes, Stack size 32 bytes, gd32h759i_eval.o(.text.gd_eval_led_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = gd_eval_led_init &rArr; gpio_mode_set
</UL>
<BR>[Calls]<UL><LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_mode_set
<LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_output_options_set
<LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
</UL>
<BR>[Called By]<UL><LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bsp_board_config
</UL>

<P><STRONG><a name="[d1]"></a>gd_eval_led_off</STRONG> (Thumb, 40 bytes, Stack size 4 bytes, gd32h759i_eval.o(.text.gd_eval_led_off))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = gd_eval_led_off
</UL>
<BR>[Called By]<UL><LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bsp_board_config
</UL>

<P><STRONG><a name="[e9]"></a>gd_eval_led_toggle</STRONG> (Thumb, 40 bytes, Stack size 4 bytes, gd32h759i_eval.o(.text.gd_eval_led_toggle))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = gd_eval_led_toggle
</UL>
<BR>[Called By]<UL><LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;communication_check
</UL>

<P><STRONG><a name="[c3]"></a>get_micros</STRONG> (Thumb, 186 bytes, Stack size 16 bytes, main.o(.text.get_micros))
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = get_micros &rArr; __aeabi_uldivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
</UL>
<BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Message_IRQHandler
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;print_test_status
</UL>

<P><STRONG><a name="[e0]"></a>gpio_af_set</STRONG> (Thumb, 212 bytes, Stack size 24 bytes, gd32h7xx_gpio.o(.text.gpio_af_set))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = gpio_af_set
</UL>
<BR>[Called By]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_gpio_config
</UL>

<P><STRONG><a name="[df]"></a>gpio_mode_set</STRONG> (Thumb, 156 bytes, Stack size 28 bytes, gd32h7xx_gpio.o(.text.gpio_mode_set))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = gpio_mode_set
</UL>
<BR>[Called By]<UL><LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_led_init
<LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_gpio_config
</UL>

<P><STRONG><a name="[de]"></a>gpio_output_options_set</STRONG> (Thumb, 146 bytes, Stack size 24 bytes, gd32h7xx_gpio.o(.text.gpio_output_options_set))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = gpio_output_options_set
</UL>
<BR>[Called By]<UL><LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_led_init
<LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_gpio_config
</UL>

<P><STRONG><a name="[c4]"></a>is_all_zero_data</STRONG> (Thumb, 66 bytes, Stack size 8 bytes, main.o(.text.is_all_zero_data))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = is_all_zero_data
</UL>
<BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Message_IRQHandler
</UL>

<P><STRONG><a name="[ad]"></a>main</STRONG> (Thumb, 452 bytes, Stack size 56 bytes, main.o(.text.main))
<BR><BR>[Stack]<UL><LI>Max Depth = 420<LI>Call Chain = main &rArr; bsp_board_config &rArr; gd_eval_com_init &rArr; usart_baudrate_set &rArr; rcu_clock_freq_get &rArr; rcu_pll_clock_freq_cal
</UL>
<BR>[Calls]<UL><LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;communication_check
<LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_data_receive
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_flag_get
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_interrupt_enable
<LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_mailbox_config
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_struct_para_init
<LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_config
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_gpio_config
<LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bsp_board_config
<LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;systick_config
<LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;cache_enable
<LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;print_test_status
<LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;process_uart_command
<LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reset_test_data
<LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_micros
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;printf
</UL>
<BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
</UL>
<P><STRONG><a name="[d6]"></a>nvic_irq_enable</STRONG> (Thumb, 244 bytes, Stack size 32 bytes, gd32h7xx_misc.o(.text.nvic_irq_enable))
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = nvic_irq_enable &rArr; nvic_priority_group_set
</UL>
<BR>[Calls]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_priority_group_set
</UL>
<BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_config
</UL>

<P><STRONG><a name="[f6]"></a>nvic_priority_group_set</STRONG> (Thumb, 28 bytes, Stack size 4 bytes, gd32h7xx_misc.o(.text.nvic_priority_group_set))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = nvic_priority_group_set
</UL>
<BR>[Called By]<UL><LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
</UL>

<P><STRONG><a name="[cd]"></a>nvic_vector_table_set</STRONG> (Thumb, 40 bytes, Stack size 8 bytes, gd32h7xx_misc.o(.text.nvic_vector_table_set))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = nvic_vector_table_set
</UL>
<BR>[Called By]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemInit
</UL>

<P><STRONG><a name="[c5]"></a>print_test_results</STRONG> (Thumb, 390 bytes, Stack size 32 bytes, main.o(.text.print_test_results))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = print_test_results &rArr; __aeabi_uldivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;printf
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
</UL>
<BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Message_IRQHandler
</UL>

<P><STRONG><a name="[f3]"></a>print_test_status</STRONG> (Thumb, 346 bytes, Stack size 40 bytes, main.o(.text.print_test_status))
<BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = print_test_status &rArr; get_micros &rArr; __aeabi_uldivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_micros
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;printf
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
</UL>
<BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[f5]"></a>process_uart_command</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, main.o(.text.process_uart_command))
<BR><BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[dc]"></a>rcu_can_clock_config</STRONG> (Thumb, 124 bytes, Stack size 12 bytes, gd32h7xx_rcu.o(.text.rcu_can_clock_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = rcu_can_clock_config
</UL>
<BR>[Called By]<UL><LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_gpio_config
</UL>

<P><STRONG><a name="[f7]"></a>rcu_clock_freq_get</STRONG> (Thumb, 3148 bytes, Stack size 240 bytes, gd32h7xx_rcu.o(.text.rcu_clock_freq_get))
<BR><BR>[Stack]<UL><LI>Max Depth = 260<LI>Call Chain = rcu_clock_freq_get &rArr; rcu_pll_clock_freq_cal
</UL>
<BR>[Calls]<UL><LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_irc64mdiv_freq_get
<LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_pll_clock_freq_cal
</UL>
<BR>[Called By]<UL><LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_baudrate_set
</UL>

<P><STRONG><a name="[f8]"></a>rcu_irc64mdiv_freq_get</STRONG> (Thumb, 152 bytes, Stack size 4 bytes, gd32h7xx_rcu.o(.text.rcu_irc64mdiv_freq_get))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = rcu_irc64mdiv_freq_get
</UL>
<BR>[Called By]<UL><LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_clock_freq_get
</UL>

<P><STRONG><a name="[dd]"></a>rcu_periph_clock_enable</STRONG> (Thumb, 40 bytes, Stack size 4 bytes, gd32h7xx_rcu.o(.text.rcu_periph_clock_enable))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = rcu_periph_clock_enable
</UL>
<BR>[Called By]<UL><LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_led_init
<LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_gpio_config
</UL>

<P><STRONG><a name="[da]"></a>rcu_periph_reset_disable</STRONG> (Thumb, 40 bytes, Stack size 4 bytes, gd32h7xx_rcu.o(.text.rcu_periph_reset_disable))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = rcu_periph_reset_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_deinit
<LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
</UL>

<P><STRONG><a name="[d9]"></a>rcu_periph_reset_enable</STRONG> (Thumb, 40 bytes, Stack size 4 bytes, gd32h7xx_rcu.o(.text.rcu_periph_reset_enable))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = rcu_periph_reset_enable
</UL>
<BR>[Called By]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_deinit
<LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
</UL>

<P><STRONG><a name="[c6]"></a>reset_test_data</STRONG> (Thumb, 90 bytes, Stack size 0 bytes, main.o(.text.reset_test_data))
<BR><BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Message_IRQHandler
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[f2]"></a>systick_config</STRONG> (Thumb, 50 bytes, Stack size 8 bytes, systick.o(.text.systick_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = systick_config &rArr; SysTick_Config &rArr; __NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
<LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Config
</UL>
<BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[ed]"></a>usart_baudrate_set</STRONG> (Thumb, 344 bytes, Stack size 40 bytes, gd32h7xx_usart.o(.text.usart_baudrate_set))
<BR><BR>[Stack]<UL><LI>Max Depth = 300<LI>Call Chain = usart_baudrate_set &rArr; rcu_clock_freq_get &rArr; rcu_pll_clock_freq_cal
</UL>
<BR>[Calls]<UL><LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_clock_freq_get
</UL>
<BR>[Called By]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
</UL>

<P><STRONG><a name="[f4]"></a>usart_data_receive</STRONG> (Thumb, 16 bytes, Stack size 4 bytes, gd32h7xx_usart.o(.text.usart_data_receive))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = usart_data_receive
</UL>
<BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[ea]"></a>usart_data_transmit</STRONG> (Thumb, 24 bytes, Stack size 8 bytes, gd32h7xx_usart.o(.text.usart_data_transmit))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_data_transmit
</UL>
<BR>[Called By]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fputc
</UL>

<P><STRONG><a name="[ec]"></a>usart_deinit</STRONG> (Thumb, 286 bytes, Stack size 48 bytes, gd32h7xx_usart.o(.text.usart_deinit))
<BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = usart_deinit &rArr; rcu_periph_reset_disable
</UL>
<BR>[Calls]<UL><LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_disable
<LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_enable
</UL>
<BR>[Called By]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
</UL>

<P><STRONG><a name="[f0]"></a>usart_enable</STRONG> (Thumb, 18 bytes, Stack size 4 bytes, gd32h7xx_usart.o(.text.usart_enable))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = usart_enable
</UL>
<BR>[Called By]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
</UL>

<P><STRONG><a name="[eb]"></a>usart_flag_get</STRONG> (Thumb, 58 bytes, Stack size 12 bytes, gd32h7xx_usart.o(.text.usart_flag_get))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = usart_flag_get
</UL>
<BR>[Called By]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fputc
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[ee]"></a>usart_receive_config</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, gd32h7xx_usart.o(.text.usart_receive_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_receive_config
</UL>
<BR>[Called By]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
</UL>

<P><STRONG><a name="[ef]"></a>usart_transmit_config</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, gd32h7xx_usart.o(.text.usart_transmit_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_transmit_config
</UL>
<BR>[Called By]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
</UL>

<P><STRONG><a name="[fb]"></a>__0printf</STRONG> (Thumb, 22 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[10e]"></a>__1printf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)

<P><STRONG><a name="[10f]"></a>__2printf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)

<P><STRONG><a name="[110]"></a>__c89printf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)

<P><STRONG><a name="[c7]"></a>printf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = printf
</UL>
<BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Message_IRQHandler
<LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_config
<LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bsp_board_config
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;print_test_results
<LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;print_test_status
</UL>

<P><STRONG><a name="[111]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)

<P><STRONG><a name="[112]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)

<P><STRONG><a name="[113]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)
<P>
<H3>
Local Symbols
</H3>
<P><STRONG><a name="[c9]"></a>SysTick_Config</STRONG> (Thumb, 82 bytes, Stack size 16 bytes, systick.o(.text.SysTick_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SysTick_Config &rArr; __NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
</UL>
<BR>[Called By]<UL><LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;systick_config
</UL>

<P><STRONG><a name="[ca]"></a>__NVIC_SetPriority</STRONG> (Thumb, 66 bytes, Stack size 8 bytes, systick.o(.text.__NVIC_SetPriority))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = __NVIC_SetPriority
</UL>
<BR>[Called By]<UL><LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Config
<LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;systick_config
</UL>

<P><STRONG><a name="[cc]"></a>system_clock_config</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, system_gd32h7xx.o(.text.system_clock_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = system_clock_config &rArr; system_clock_600m_hxtal
</UL>
<BR>[Calls]<UL><LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_600m_hxtal
</UL>
<BR>[Called By]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemInit
</UL>

<P><STRONG><a name="[fa]"></a>system_clock_600m_hxtal</STRONG> (Thumb, 374 bytes, Stack size 16 bytes, system_gd32h7xx.o(.text.system_clock_600m_hxtal))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = system_clock_600m_hxtal
</UL>
<BR>[Called By]<UL><LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_config
</UL>

<P><STRONG><a name="[e7]"></a>can_data_to_little_endian_swap</STRONG> (Thumb, 138 bytes, Stack size 24 bytes, gd32h7xx_can.o(.text.can_data_to_little_endian_swap))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = can_data_to_little_endian_swap
</UL>
<BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_mailbox_receive_data_read
</UL>

<P><STRONG><a name="[e4]"></a>can_dlc_value_compute</STRONG> (Thumb, 86 bytes, Stack size 8 bytes, gd32h7xx_can.o(.text.can_dlc_value_compute))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = can_dlc_value_compute
</UL>
<BR>[Called By]<UL><LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_mailbox_config
</UL>

<P><STRONG><a name="[e5]"></a>can_data_to_big_endian_swap</STRONG> (Thumb, 142 bytes, Stack size 24 bytes, gd32h7xx_can.o(.text.can_data_to_big_endian_swap))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = can_data_to_big_endian_swap
</UL>
<BR>[Called By]<UL><LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_mailbox_config
</UL>

<P><STRONG><a name="[e6]"></a>can_payload_size_compute</STRONG> (Thumb, 114 bytes, Stack size 12 bytes, gd32h7xx_can.o(.text.can_payload_size_compute))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = can_payload_size_compute
</UL>
<BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_mailbox_receive_data_read
</UL>

<P><STRONG><a name="[f9]"></a>rcu_pll_clock_freq_cal</STRONG> (Thumb, 106 bytes, Stack size 20 bytes, gd32h7xx_rcu.o(.text.rcu_pll_clock_freq_cal))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = rcu_pll_clock_freq_cal
</UL>
<BR>[Called By]<UL><LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_clock_freq_get
</UL>

<P><STRONG><a name="[fd]"></a>_fp_digits</STRONG> (Thumb, 366 bytes, Stack size 64 bytes, printfa.o(i._fp_digits), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
<LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
<LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
<LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2ulz
<LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_cdrcmple
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
</UL>
<BR>[Called By]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[fc]"></a>_printf_core</STRONG> (Thumb, 1744 bytes, Stack size 136 bytes, printfa.o(i._printf_core), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_pre_padding
<LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_post_padding
<LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
<LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uidivmod
</UL>
<BR>[Called By]<UL><LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__0printf
</UL>

<P><STRONG><a name="[100]"></a>_printf_post_padding</STRONG> (Thumb, 36 bytes, Stack size 24 bytes, printfa.o(i._printf_post_padding), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[ff]"></a>_printf_pre_padding</STRONG> (Thumb, 46 bytes, Stack size 24 bytes, printfa.o(i._printf_pre_padding), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>
<P>
<H3>
Undefined Global Symbols
</H3><HR></body></html>
